Vaisala RVP900

Appendix F ___________________________________________________ RCP902 WSR98D Panel
VAISALA______________________________________________________________________ 473
RVP9_TP2 RVP dspx debug options
J22
RCP9_TP1 RCP rcpTP1Value rcpTP1Enabled = "true"
J23
RCP9_TP2 RCP rcpTP2Value rcpTP2Enabled = "true"
LED
GO RVP / RCP RCP ~cAux[64] Both RVP and RCP process must
be running, toggling their GO bits
for this LED to blink
DCU OK RCP ~cAux[66]
DAU OK RCP ~cAux[65]
INT POWER When on 5V power on panel has
reached acceptable levels.
J1 OK When on 5V IFDR signal pin is
mated on J1
J2 OK When on 5V IFDR signal pin is
mated on J2
CONN OK When on IFDR is in WSR98D
mode and J1 and J2 cables are
installed in the right order
IFDR
Radiate Command RCP cAux[29]
Rf Test Command RCP cAux[26]
CW Test Command RCP cAux[25]
Radiate Status RCP sAux[29]
Rf Test Status RCP sAux[26]
CW Test Status RCP cAux[25]
Rx Protect Status RCP cAux[30]
Table 33 Software Control/Status Variable
Signal Name Controlling
Process
Programmable
Logic Variable
Conditions