ZiLOG Z8 Series User Manual

Z8
®
CPU
User Manual
UM001604-0108 Instruction Description
167
Clear
Syntax
CLR dst
Instruction Format
Operation
dst ← 0
The destination operand is cleared to 00h.
Address modes R or IR can be used to specify a 4-bit Working Register. In this format, the
destination Working Register operand is specified by adding
1110b (Eh) to the high nibble
of the operand. For example, if Working Register R12 (CH) is the destination operand, then
ECh is used as the destination operand in the Op Code.
Example
If Working Register R6 contains AFh, the statement:
CLR R6
Op Code: B0 E6
leaves the value 00h in Working Register R6.
If Register
A5h contains the value 23h, and Register 23h contains the value FCh, the state-
ment:
CLR @A5h
Op Code: B1 A5
leaves the value 00h in Register 23h.
Cycles
OPC
(Hex)
Address
dst
OPC dst
6B0R
6B1IR
Flag Description
C Unaffected
Z Unaffected
S Unaffected
V Unaffected
D Unaffected
H Unaffected
Edst
Note:

ZiLOG Z8 Series Specifications

General

Brand	ZiLOG
Model	Z8 Series
Category	Microcontrollers
Language	English