EasyManuals Logo
Home>Agilent Technologies>Inverter>E4428C

Agilent Technologies E4428C User Manual

Agilent Technologies E4428C
700 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #55 background imageLoading...
Page #55 background image
Chapter 2 31
E4438C Vector Signal Generator Overview
Front Panel Overview
26. Standby LED
This yellow LED indicates when the signal generator power switch is set to the standby condition.
27. Line Power LED
This green LED indicates when the signal generator power switch is set to the on position.
28. Power Switch
This switch activates full power to the signal generator when set to the on position, and deactivates all signal
generator functions when in standby mode. In standby mode, the signal generator remains connected to the
line power, and power is supplied to some internal circuits.
29. SYMBOL SYNC Connector (Option 001/601 or 002/602)
This female BNC input connector accepts an externally supplied symbol sync signal for use with digital
modulation applications. The expected input is a CMOS bit clock signal. It may be used in two modes.
When used as a symbol sync in conjunction with a data clock, the signal must be high during the first data
bit of the symbol. The signal must be valid during the falling edge of the data clock signal and may be a
single pulse or continuous. When the SYMBOL SYNC itself is used as the (symbol) clock, the CMOS
falling edge is used to clock the DATA signal.
The maximum clock rate is 50 MHz. The d
amage levels are > +5.5 volts and < −0.5 volts.
On signal generators with Option 1EM, this input is relocated to a rear panel SMB connector.
When using the real-time W-CDMA uplink personality, this connector should not be used to connect the
external baseband generator data clock. The BASEBAND GEN REF IN connector should be used instead.
30. DATA CLOCK Connector (Option 001/601 or 002/602)
The female BNC input connector accepts a CMOS externally supplied CMOS compatible signal data-clock
input used with digital modulation applications. The expected input is a CMOS bit clock signal where the
rising edge is aligned with the beginning data bit. The falling edge is used to clock the DATA and SYMBOL
SYNC signals.
The maximum clock rate is 50 MHz. The damage levels are > +5.5 volts and < 0.5 volts.
On signal generators with Option 1EM, this input is relocated to a rear panel SMB connector.

Table of Contents

Other manuals for Agilent Technologies E4428C

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Agilent Technologies E4428C and is the answer not in the manual?

Agilent Technologies E4428C Specifications

General IconGeneral
BrandAgilent Technologies
ModelE4428C
CategoryInverter
LanguageEnglish

Related product manuals