Publication 1756-UM514B-EN-P - February 2003
Application Guidelines and Tips C-3
· A DH+ or remote I/O message can take up to 2 connections in
the UCB. 1 connection is used for the forward open and 1
connection is used for the reply.
· Cached connections are separate from the UCB number.
· We recommend that the number of uncached messages enabled
in your application be no more than 50% of your UCB limit. For
example, if you are using the 40 UCB limit, we recommend that
no more than 20 uncached messages are enabled at once.
If your application requires that more uncached messages are
enabled than 50% of your UCB, you should manage the
messages to make sure that only up to 50% are enabled at any
single time. For example, if your application uses the 10 UCB
limit but requires 7 uncached messages, make sure only up to 5
uncached messages are active at any time.
· If the message is giving error #301 that means the UCB is full
Message Manager
Even though the unconnected message buffer can be increased to 40,
the best throughput performance is attained when only 5 messages
are enabled in a ControlLogix controller at one time. One simple
method of managing your messages is to enable 5 messages, wait for
all 5 to complete and than enable another set of 5 messages. Repeat
the process as needed until all required message completed.
Messages Between a
ControlLogix Controller
and PLC Devices
For more information on 1756-DHRIO module’s performance when
messages are sent between a ControlLogix controller and PLC devices,
see the Rockwell Automation Knowledge Base. The database can be
accessed from the following location:
http://support.rockwellautomation.com
RPI Configuration Settings
· Requested Packet Interrupt (RPI) setting on the 1756-DHRIO
module is the time where the DHRIO module will send status
information to the controller. It is not the time where data is
transferred from the DHRIO to the controller.
· RPI setting for adapter modules are used to send discrete data
from the adapter racks to the controller
· All adapter racks underneath the same channel of a DHRIO
module should be set to the same RPI time
· Block Transfer data is updated during the time slice period as
specified in the ControlLogix controller
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