Level One Memory System
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 8-21
ID073015 Non-Confidential
detection schemes. The processor includes features that enable it to detect some address decoder
faults. If you are implementing the processor and require these features, contact ARM to discuss
the features and your requirements.
Handling cache parity errors
Table 8-2 shows the behavior of the processor on a cache parity error, depending on bits [5:3]
of the ACTLR, see c1, Auxiliary Control Register on page 4-40.
See Disabling or enabling error checking on page 8-32 for information on how to safely change
these bits.
Hardware recovery
When parity checking is enabled, hardware recovery is always enabled. Memory marked as
write-back write-allocate behaves as write-though. This ensures that cache lines can never be
dirty, therefore the error can always be recovered from by invalidating the cache line that
contains the parity error. The processor automatically performs this invalidation when an error
is detected. The correct data can then be re-read from the L2 memory system.
Parity aborts
If aborts on parity errors are enabled, software is notified of the error by a data abort or prefetch
abort. The error is still automatically corrected by the hardware even if an abort is generated.
If abort generation is not enabled, the hardware recovery, including the access retry, is invisible
to software. If required, software can use events and the CFLR to monitor the errors that are
detected and corrected. See Error detection events on page 8-36 and Correctable Fault Location
Register on page 4-75.
Table 8-2 Cache parity error behavior
Value Behavior
b000
Generate abort on parity errors
a
, force write-through, enable hardware recovery
a. Parity errors caused by ACP coherency maintenance operations do not generate aborts
b001
b010
b011 Reserved
b100 Disable parity checking
b101 Do not generate abort on parity errors, force write-through, enable hardware recovery
b110
b111 Reserved
To Next Page
Loading...
