AES/EBU INTERFACE GENERATION
Interface Signal
Amplitude Range
Balanced (XLR)
0-5.12 Vpp, ±(10% + 80 mV) into 110Ω in 5 mV
steps
Unbalanced (BNC)
0 to 1.28 Vpp, ±(8% + 20 mV) into 75Ω in 1.25
mV steps
Channel Status Bits English language decoded, Professional or
consumer formats. CRCC implemented
Time of Day not implemented
Sample Count not implemented
User Bits
set to 0
Validity Flag
Selectable, set or cleared
AES/EBU Impairments
Induced Jitter
Sinewave
Jitter Freq Range
40 Hz to 38.8 kHz
Jitter Freq Accuracy
±0.0020% [±20 PPM]
Jitter Amplitude
0-1.28 UI (pk), ±(10% + 0.01 UI) in steps of
0.005 UI or better
1.3-12.75 UI (pk), ±10% in steps of 0.05 UI or
better
Jitter Flatness
±1 dB ref 500Hz, 50 Hz to 30 kHz
Residual Jitter, (total generator/analyzer)
peak calibrated
RMS response
≤0.005 UI (700 Hz-30 kHz BW),
Peak response
≤0.015 UI (700 Hz-30 kHz BW),
Spurious Jitter Products
Jitter & Ref Delay Off
≤0.0005 UI
Jitter On
≤-30 dB below jitter signal
REFERENCE INPUT CHARACTERISTICS
Input Formats
AES/EBU (per AES 3-1992)
Input Sample Rates 28.8 kHz-52.8 kHz AES/EBU
(must equal desired output rate)
Minimum Input Amplitude
400 mVpp
Input Impedance
Nominally 110 Ω
Lock Range
±0.0025% [±25 PPM]
D Specifications
Appendix D - Specifications
ATS-1 Dual Domain User's Manual D-9
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