Beck IPC SC123 - SC1 X3 Functional Description; CPU Core and Registers

IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 24
6 Functional Description
6.1 CPU
6.1.1 Registers
The CPU core implements an 8086 microprocessor, and includes the 10 additional 80186 instructions. This
allows the CPU to be fully software compatible with 8086 and 80186 family of processors.
To maintain full program compatibility with the 8086 and the 80186, all registers have been fully implemented.
16-Bit Register Name
8-Bit Register Name
Special Register Functions
15
8
7
0
AX
AH
AL
Multiply/Divide
DX
DH
DL
I/O Instructions
CX
CH
CL
Loop/Shift/Repeat/Count
BX
BH
BL
Base Registers
BP
SI
Index Registers
DI
SP
Stack Pointer
Table 6-1: General Purpose Registers
15
0
CS
Code Segment Register
DS
Data Segment Register
SS
Stack Segment Register
ES
Extra Segment Register
Segment Registers
FLAGS
Status Word
IP
Instruction Pointer
Status and Control
Registers
Table 6-2: Segment, Status and Control Registers