IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 8
2 Features
16-bit SC186-EX CPU
Software compatible with SC186/AM186
(x86 instruction set)
Programmable PLL provides up to 96 MHz
using one 25MHz Clock
256 KByte internal fast SRAM (zero wait state
operation)
Embedded boot loader in ROM
Full external system bus interface
24-bit address bus
16-bit data bus
Programmable Chip Selects
Embedded Ethernet controllers
Two 10/100Mbps Ethernet Controllers with
one built-in PHY and one MII PHY interface,
32 byte FIFOs
Four high performance serial ports
RS232/422/485 RTS/CTS and DMA
Enhanced receive FIFOs (4 deep)
Additional handshake control
Two CAN V2.0B 1 Mbps controllers
hardware priority queuing and data filtering
features
One Universal Serial Bus (USB) 1.1 Port
One 3-wire Serial Peripheral Interface (SPI)
controller (48MHz)
One 2-wire I²C serial controller
JTAG interface
In-circuit emulator support with breakpoints
and trace buffer
Four DMA channels, interrupt controller, 2
independent timers, and external memory
select logic
Watchdog-timer and power-on reset logic
Internal 8 MByte SDRAM memory
Up to 8 MByte Flash memory
Expandable through external Flash memory
Special NV-SRAM interface supports external
non-volatile memory
31 GPIO pins
Package 25x25 mm 177 PBGA, 1.27 pitch, lead
free, RoHS compliant
Temperature range: -25°C to 85°C ambient
Power Dissipation < 2 W
Pre-installed Real Time Operating System
(IPC@CHIP RTOS)
Software-compatible with the 80C186
microcontrollers and IPC@CHIP family
SC11/12/13 with widely available native
development tools, applications, and system
software
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