IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 39
6.7 Power Fail Interrupt
6.7.1 Description
The power fail interrupt is a special non-maskable interrupt for saving non-volatile data. It is used to protect
important data for being lost if the system power breaks down unexpectedly.
There are two different locations for saving non-volatile data, the internal flash memory and an external
memory. The external memory can be a battery buffered SRAM or an NV-SRAM.
6.7.2 Storing non-volatile data to internal flash memory
The primary requirement for saving data with the internal flash in the event of an unexpected power down is to
provide the IPC@CHIP enough time to write the data. How much time is needed depends on how much data
has to be written. 30ms of time is necessary to save one block of 2kByte retentive data. If the data is not in one
block, it takes more time to save.
The data has to be stored in the flash and the file-system has to be closed, before the power supply of the
IPC@CHIP breaks the recommended conditions. To provide the necessary power long enough, the power
supply needs sufficient capacity. A circuit has to watch over the input voltage and must generate a high at the
PFI pin, when the input voltage sinks below the critical point (power fail voltage level).
After a power-fail interrupt, the system needs a reboot. The system will not boot until the PFI pin is low unless
PFI_ENABLE in the CHIP.INI is set to zero (see chapter 5.3 PFI Pin).
6.7.3 Storing non-volatile data to external memory
By mapping external memory to the internal RTOS architecture, any memory can be connected to the SC1x3.
This allows the user to use an NV-SRAM, a battery buffered SRAM or any other device that can be mapped to
the internal memory (see chapter 0) to save non-volatile data.
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