12 (55) BRUKER BIOSPIN Technical Manual Version 001
Installation and Handling
Connectors 2.5.1
Data Output to Gradient Amplifier
• Low voltage, low noise LVDS output via 8 balanced data lines and one clock
line.
• A transfer rate of 80 mega-words per second.
• A word width of 48 bits.
Data Input from Gradient Controller
• Low voltage, low noise LVDS input via 8 balanced data lines and one clock
line.
• A transfer rate of 80 mega-words per second.
• A word width of 48 bits.
“Next Value” Clock from IPSO
When installed in the “IPSO 19” the DPP1 takes the “Next Value” clock via its ST1
connector connected to ST32 of the IPSO (IMB) using the cable H5516. In the
“IPSO AQS” the DPP gets this clock signal via pin B14 of the PCI connector.
Currents and Voltages 2.5.2
IPSO 19“ IPSO AQS and Others
Source of the „Next Value“ Clock ST1/H5516/St32 PCI B14
Part Number +5 V + 3.3 V +12 V +5 VSB -12 V
H12513F1 0 0.5 A 0 0 0
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