Bruker DPP1 - Local Bus Configuration Registers; Local Bus Interface; Table 5.4: Local Bus Chip Select Signals Usage; Table 5.5: Local Bus Chip Select Registers

24 (55) BRUKER BIOSPIN Technical Manual Version 001
Description
Local Bus Interface
The PCI controller provides 4 chip select signals on its local bus side to access
different address spaces.
Local Bus Configuration Registers 5.4.3
Table 5.4: Local Bus Chip Select Signals Usage
PCI9030 Chip Select Signals Usage Address Range
PLX CS 0 DSP HPI
PLX CS 1 Pipeline Register
PLX CS 2 DSP Reset
PLX CS 3 Flash Memory
Table 5.5: Local Bus Chip Select Registers
PCI
Address
Offset
Register Description
Register
Name
Register Values
Register Value
Description
3C h Chip Select 0 Base Address CS0BASE 0000 0081 h CS0 enabled; Addr=0xxh
Range=256B
40 h Chip Select 1 Base Address CS1BASE 0000 0281 h CS1 enabled; Addr=2xxh
Range=256B
44 h Chip Select 2 Base Address CS2BASE 0000 0481 h CS2 enabled; Addr=4xxh
Range=256B
48 h Chip Select 3 Base Address CS3BASE 0001 8001 h CS3 enabled;
Addr=1xxxxh
Range=64kB
Table 5.6: Local Bus Configuration Registers
PCI
Address
Offset
Register Description
Register
Name
Register
Values
Register Value
Description
00h Local Address Space 0 Range LAS0RR FFF0 0000 h 1MB Byte Local Memory
Space, non-prefetch
04h Local Address Space 1 Range LAS1RR FFFF 0000 h 64kB Byte Local Mem-
ory Space, non-prefetch
08h Local Address Space 2 Range LAS1RR FFFF 0000 h 64kB Byte Local Mem-
ory Space, non-prefetch