Bruker DPP1 - DSP Defined Address Ranges; Table 5.17: DSP Address Map

30 (55) BRUKER BIOSPIN Technical Manual Version 001
Description
DSP Defined Address Ranges
HD8
1
Device Endian mode
0 – The system operates in Big Endian mode.
1 – System operates in Little Endian mode [default].
HD[4:3]
00
Boot mode configuration pins
00 – CE1 width 32–bit, HPI boot/ Emulation boot
01 – CE1 width 8–bit, asynchronous external ROM boot with default
timings [default mode]
01 – CE1 width 16–bit, asynchronous external ROM boot with default
timings [default mode]
01 – CE1 width 32–bit, asynchronous external ROM boot with default
timings [default mode].
CLKMODE0
1
Clock generator input clock source select
0 – Reserved
1 – CLKIN square wave [default].
Table 5.17: DSP Address Map
Memory Block Description Block size (Bytes) Hex Address Range
Internal Ram (L2) 192 K 0000 0000 – 0002 FFFF
Internal Ram / Cache 64 K 0003 0000 – 0003 FFFF
Reserved 24M – 256K 0004 0000 – 017F FFFF
EMIF Register 256 K 0180 0000 – 0183 FFFF
L2 Registers 128 K 0184 0000 – 0185 FFFF
Reserved 128 K 0186 0000 – 0187 FFFF
HPI Registers 256 K 0188 0000 – 018B FFFF
McBSP 0 Registers 256 K 018C 0000 – 018F FFFF
McBSP 1 Registers 256 K 0190 0000 – 0193 FFFF
Timer 0 Registers 256 K 0194 0000 – 0197 FFFF
Timer 1 Registers 256 K 0198 0000 – 019B FFFF
Interrupt Selector Registers 512 019C 0000 – 019C 01FF
Table 5.16: DSP Configuration Pins