Bruker DPP1 - Page 31

Description
Technical Manual Version 001 BRUKER BIOSPIN 31 (55)
Device Configuration Registers 4 019C 0200 – 019C 0203
Reserved 256 K – 516 019C 0204 – 019F FFFF
EDMA Ram & EDMA Registers 256 K 01A0 0000 – 01A3 FFFF
Reserved 768 K 01A4 0000 – 01AF FFFF
GPIO Registers 16 K 01B0 0000 – 01B0 3FFF
Reserved 240 K 01B0 4000 – 01B3 FFFF
I2C0 Registers 16 K 01B4 0000 – 01B4 3FFF
I2C1 Registers 16 K 01B4 4000 – 01B4 7FFF
Reserved 16 K 01B4 8000 – 01B4 BFFF
McASP0 Registers 16 K 01B4 C000 – 01B4 FFFF
McASP1 Registers 16 K 01B5 0000 – 01B5 3FFF
Reserved 160 K 01B5 4000 – 01B7 BFFF
PLL Registers 8 K 01B7 C000 – 01B7 DFFF
Reserved 264 K 01B7 E000 – 01BB FFFF
Emulation Register 256 K 01BC 0000 – 01BF FFFF
Reserved 4 M 01C0 0000 – 01FF FFFF
QDMA Registers 52 0200 0000 – 0200 0033
Reserved 16 M – 52 0200 0034 – 02FF FFFF
Reserved 720 M 0300 0000 – 2FFF FFFF
McBSP 0 Data Port 64 M 3000 0000 – 33FF FFFF
McBSP 1 Data Port 64 M 3400 0000 – 37FF FFFF
Reserved 64 M 3800 0000 – 3BFF FFFF
McASP 0 Data Port 1 M 3C00 0000 – 3C0F FFFF
McASP 1 Data Port 1 M 3C10 0000 – 3C1F FFFF
Reserved 1 G + 62 M 3C20 0000 – 7FFF FFFF
EMIF CE0 256 M 8000 0000 – 8FFF FFFF
EMIF CE1 256 M 9000 0000 – 9FFF FFFF
EMIF CE2 256 M A000 0000 – AFFF FFFF
EMIF CE3 256 M B000 0000 – BFFF FFFF
Reserved 1 G C000 0000 – FFFF FFFF
Table 5.17: DSP Address Map