Bruker DPP1 - PCI Software Interface

22 (55) BRUKER BIOSPIN Technical Manual Version 001
Description
PCI Software Interface 5.4.2
After power-up, the PCI address map of the internal DPP addresses at the local
bus is created by the BIOS using the contents in the configuration registers “base
address 0...5”. The results are the PCI base addresses for the local bus chip se
-
lects which are written into the same configuration registers by BIOS.
2Eh Subsystem ID [31:16] 0000 h
2Ch Subsystem Vendor ID [15:0] 0000 h
36h MSB New Capability Pointer 0000 h Reserved
34h LSB New Capability Pointer CAP_PTR[7:0] 0040 h
3Eh Maximum Latency & min. Grant 0000 h Not loadable
3Ch Interrupt Pin/Line [15:0] 01FF h
42h MSW of Power Management Capa-
bilities
PMC
[15:11,5,3:0]
4801 h
40h LSW of Power Management Next
Capability pointer
PMNEXT [7:0]
PMCCA
-
PID[7:0]
4801 h
46h MSW of Power Management data 0000 h Reserved
44h LSW of Power Management Con-
trol / Status
PMCSR
[14:8]/ PCIILR
[7:0]
0000 h
4Ah MSW of Hot Swap / Control 0000 h Reserved
48h LSW of Hot Swap Next Capability
Pointer / Control
HS_NEXT[7:0]
HS_CNTL[7:0]
4C06
4Eh PCI Vital Product Data Address 0000 h Reserved
4Ch PCI Vital Product Data Next Capa-
bility Pointer / Control
PVPD_NEXT[
7: 0] PVPD
-
CNTL[7:0]
0003 h