Description
Technical Manual Version 001 BRUKER BIOSPIN 49 (55)
Engineering Design 5.6
Dimensions
Length of the card: Short, 176 mm.
Figure 5.8: IPSO AQS ACQ Built from 5 TX-Controllers
JTAG Structure
The board has a JTAG interface with three chains that can be used for program-
ming and testing.
Table 5.43: JTAG Structure on the DPP1
Connector
St4
JTAG Bridge
U5, Adr=0
JTAG Chains Chain1 Chain2 Chain3
U18, PCI_Controller U8:DSP U17:CPLD
Devices
U11:FIFO
U7:FIFO
1. INPUT from the Gradient Controller 5. DSP Emulation Switch
2. OUTPUT to the Gradient Amplifier 6. DSP JTAG Connector
3. Next Value Clock INPUT 7. JTAG Programming/Test Connector
4. Reset Button