Bruker DPP1 - Bus Structure; Dsp; The PCI Interface

18 (55) BRUKER BIOSPIN Technical Manual Version 001
Description
The PCI Interface 5.2.1
The PCI interface for the DPP1 is implemented using the PCI controller PCI9030
from PLX Technologies. The controller translates external PCI access to internal
local bus access and vice versa. The local bus of the controller is connected to the
mailbox register and the host port of the DSP.
Bus Structure
The DPP1 has two independent bus systems:
• The local bus
• The DSP External Memory Interface (EMIF) bus
Each of these buses has its own address range. Exchanging data between the
two busses is only possible via the DSP host port.
The DSP memory bus is attached to an external memory, as well as the LVDS in-
put and output FIFO. The additional status register attached offers the possibility
for the DSP to exchange data directly with the PCI bus.
The DPP1 control logic registers are also connected to the DSP memory bus.
Local Bus
The local bus connects the DSP host port and the mailbox register to the PCI con-
troller. The PCI controller performs the address mapping between the PCI and the
local bus and provides the PCI bus port and the local bus port.
The PCI controller local bus has a bus width of 32 bit. The four memory regions
are distributed into the following parts:
• Space 0 is reserved for the Host Port Interface of the DSP.
• Space 1 is reserved for logic registers.
• Space 2 resets the DSP.
• Space 3 is reserved for the FLASH memory.
EMIF Bus
The DSP controls access from its host interface via the EMIF bus. The DSP mem-
ory (EMIF) bus is attached to an external memory, the DPP1 control logic, and the
LVDS input and output FIFO’s. The additional mailbox register attached offers the
possibility of the DSP exchanging data directly with the PCI bus.
• Space 0 is reserved for the external memory of the DSP.
• Space 1 is reserved for the control logic and the pipeline register.
• Space 2 is reserved for the LVDS input FIFO
• Space 3 is reserved for the LVDS output FIFO.
DSP
The DSP TMS320C6713B is a high performance floating point processor. When
operating at 300 MHz the C6713B delivers up to 1800 MFLOPS.