DIVIDE-BY-TWO
The emitter output of Q3 drives the input of
a
divide-by-two IC (U3). The impedance
is
held
at
50 ohms
by two
terminatinglbiasing resistors (R61, R62). The resistors keep the input bias to U3 below the emitter-
coupled logic (ECL) low level (approx. -2.OV). The microprocessor enables self-test by putting
a
low level
signal on pin 5 of the PIA
(U2). This turns on (213, and raises the voltage
at
U3 pin 7 to the centerbf an
ECL signal (approx.
-1.2V). This allows U3 to divide the input signal by two. The output of U3 goes to
the signal select circuits.
LO SELECT
The signal from the emitter of Q2 drives the LO select circuitv. The LO provides one (of three) signals
to the mixer
(MX1). In Band 2A
a
bias current
is
generated to unbalance the mixer and allow signals below
19OMHz to pass. In Band 2B
a
370MHz or 425MHz LO signal
is
generated that will mix with signals of
200 to
GOOMHz, and provide the 10 to 200MHz IF signal desired. In Band 2C
a
750MHz, 850MHz or
980MHz LO signal
is
generated to mix with input signals between 6OOMHz aid 1160~~~ to provide the
desired IF signal.
In Band 2A, the 3ma current to bias mixer
MX1
is
generated when Q12
is
turned on by the PIA, to apply
+12V to MX1 through R57. This will allow signals to pass that are less than the cutoff frequency of the
low pass filter
(200MHz). The LO signal to mixer MX2 from Q2
is
not allowed to pass MX2 because of the
inherent balance of the mixer. No signal can enter pin 2 of MX2 because
Q7 has been saturated, removing
bias from buffer
Q5, and shunting any RF signals to ground.
When Band 2B
is
selected, Q12
is
turned off thus balancing mixer MX1; Q6
is
turned on to unbalance
mixer MX2. With MX2 unbalanced, the LO signal from Q2 can pass through MX2 and be amplified by
Q10 and Q11, and be applied to mixer MX1.
When Band 2C
is
selected both Q6 and Q12 are off, and both mixers are balanced. In this mode Q7
is
shut
off and an LO signal
is
applied to pin 1 and 2 of MX2. The sum output of MX2
is
selected by
a
DC block-
ing capacitor
(C31). This sum (that
is
two times the incoming LO frequency)
is
amplified by Q10 and Q11
and applied to MX1.
The 010 and Q1 1 amplifier
is
a
series shunt pair, Q10 applies most of the RF input signal across the emitter
resistor R47. This determines the transistor emitter current, which will be the collector current if the out-
put
is
terminated in
a
low impedance. Q11
is
used
as
a current-to-voltage converter. The output voltage of
this converter
is
the product of the input current times the feedback resistor (R51). Sin'ce the input of this
stage
is
a
summing junction,
it
appears very close to zero ohms to the previous stage, (210. The voltage gain
of the two transistors can be approximated by
R511R47, which
is
about 3 or 10dB. Since the gain re-
quired
at
800MHz
is
slightly greater than required
at
400MHz,
a
low pass matching netdork (consisting
of L2 and C20 peaks the output signal current to
MX1 at 800 MHz. The remaining components around
Q10 and Q11 are used to bias the transistors. Shunt biasing
is
used to provide collector bias voltages of
3.4V for (210, and 4.7V for Q11.
Scans by ArtekMedia © 2007
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