Espressif ESP32-S2 User Manual

Chapter 2. API Reference
• Print registers and reboot (ESP_SYSTEM_PANIC_PRINT_REBOOT)
Outputs the relevant registers over the serial port and immediately reset the processor.
• Silent reboot (ESP_SYSTEM_PANIC_SILENT_REBOOT)
Just resets the processor without outputting anything
• GDBStub on panic (ESP_SYSTEM_PANIC_GDBSTUB)
Invoke gdbstub on the serial port, allowing for gdb to attach to it to do a postmortem of the
crash.
• GDBStub at runtime (ESP_SYSTEM_GDBSTUB_RUNTIME)
Invoke gdbstub on the serial port, allowing for gdb to attach to it and to do a debug on runtime.
This feature will switch system to single core mode.
CONFIG_ESP_SYSTEM_RTC_EXT_XTAL_BOOTSTRAP_CYCLES
Bootstrap cycles for external 32kHz crystal
Found in: Component config > ESP System Settings
To reduce the startup time of an external RTC crystal, we bootstrap it with a 32kHz square wave for a
fixed number of cycles. Setting 0 will disable bootstrapping (if disabled, the crystal may take longer to
start up or fail to oscillate under some conditions).
If this value is too high, a faulty crystal may initially start and then fail. If this value is too low, an
otherwise good crystal may not start.
To accurately determine if the crystal has started, set a larger“Number of cycles for RTC_SLOW_CLK
calibration”(about 3000).
CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
Enable RTC fast memory for dynamic allocations
Found in: Component config > ESP System Settings
This config option allows to add RTC fast memory region to system heap with capability similar to that
of DRAM region but without DMA. This memory will be consumed first per heap initialization order
by early startup services and scheduler related code. Speed wise RTC fast memory operates on APB
clock and hence does not have much performance impact.
Default value:
• Yes (enabled)
Memory protection Contains:
• CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
Enable memory protection
Found in: Component config > ESP System Settings > Memory protection
If enabled, the permission control module watches all the memory access and fires the panic handler
if a permission violation is detected. This feature automatically splits the SRAM memory into data
and instruction segments and sets Read/Execute permissions for the instruction part (below given split-
ting address) and Read/Write permissions for the data part (above the splitting address). The memory
protection is effective on all access through the IRAM0 and DRAM0 buses.
Default value:
• Yes (enabled)
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Espressif ESP32-S2 Specifications

General

Brand	Espressif
Model	ESP32-S2
Category	Single board computers
Language	English