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Espressif ESP32-S2
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Chapter 4. API Guides
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.text //Text section definition
STO offs // Offset = 0x00
STI Store data to the 32-bits memory with auto increment of predefined offset address
Syntax STI Rsrc, Rdst, Label
Operands
Rsrc Register R[0..3], holds the 16-bit value to store
Rdst Register R[0..3], address of the destination, in 32-bit words
Label 2-bit user defined unsigned value
Cycles 4 cycles to execute, 4 cycles to fetch next instruction
Description The instruction stores the 16-bit value of Rsrc to the low and high half-word of memory with address
Rdst+oset with auto increment of offset:
Mem[Rdst + offset / 4]{15:0/31:16} = {Rsrc[15:0]}
Mem[Rdst + offset / 4]{15:0/31:16} = {Label[1:0],Rsrc[13:0]}
Examples:
1: STO 0 // Set offset to 0
STI R1, R2, 0x12 //MEM[R2+0x12][15:0] = R1
STI R1, R2, 0x12 //MEM[R2+0x12][31:16] = R1
2: .data //Data section definition
Addr1: .word 123 // Define label Addr1 16 bit
.set offs, 0x00 // Define constant offs
.text //Text section definition
STO 0 // Set offset to 0
MOVE R1, 1 // R1 = 1
MOVE R2, Addr1 // R2 = Addr1
STI R1, R2 // MEM[R2 + 0] = R1
// MEM[Addr1 + 0] will be 32'hxxxx0001
STIx R1, R2 // MEM[R2 + 0] = R1
// MEM[Addr1 + 0] will be 32'h00010001
3:
STO 0 // Set offset to 0
MOVE R1, 1 // R1 = 1
STI R1, R2, 1 //MEM[R2+0x12] 0xxxxx4001
STI R1, R2, 1 //MEM[R2+0x12] 0x40014001
ST32 Store 32-bits data to the 32-bits memory
Syntax ST32 Rsrc, Rdst, oset, Label
Operands
Rsrc Register R[0..3], holds the 16-bit value to store
Rdst Register R[0..3], address of the destination, in 32-bit words
Oset 11-bit signed value, offset in bytes
Label 2-bit user defined unsigned value
Cycles 4 cycles to execute, 4 cycles to fetch next instruction
Description The instruction stores 11 bits of the PC value, label value and the 16-bit value of Rsrc to the 32-bits
memory with address Rdst+offset:
Mem[Rdst + offset / 4]{31:0} = {PC[10:0],0[2:0],Label[1:0],Rsrc[15:0]}
Examples:
Espressif Systems 1483
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