Chapter 4. API Guides
1: ST32 R1, R2, 0x12, 0 //MEM[R2+0x12][31:0] = {PC[10:0],0[2:0],
,→Label[1:0],Rsrc[15:0]}
2: .data //Data section definition
Addr1: .word 123 // Define label Addr1 16 bit
.set offs, 0x00 // Define constant offs
.text //Text section definition
MOVE R1, 1 // R1 = 1
MOVE R2, Addr1 // R2 = Addr1
ST32 R1, R2, offs,1// MEM[R2 + 0] = {PC[10:0],0[2:0],Label[1:0],
,→Rsrc[15:0]}
// MEM[Addr1 + 0] will be 32'h00010001
STI32 –Store 32-bits data to the 32-bits memory with auto increment of adress offset
Syntax STI32 Rsrc, Rdst, Label
Operands
• Rsrc –Register R[0..3], holds the 16-bit value to store
• Rdst –Register R[0..3], address of the destination, in 32-bit words
• Label –2-bit user defined unsigned value
Cycles 4 cycles to execute, 4 cycles to fetch next instruction
Description The instruction stores 11 bits of the PC value, label value and the 16-bit value of Rsrc to the 32-bits
memory with address Rdst+offset:
Mem[Rdst + offset / 4]{31:0} = {PC[10:0],0[2:0],Label[1:0],Rsrc[15:0]}
Where offset value set by STO instruction
Examples:
1: STO 0x12
STI32 R1, R2, 0 //MEM[R2+0x12][31:0] = {PC[10:0],0[2:0],Label[1:0],
,→Rsrc[15:0]}
STI32 R1, R2, 0 //MEM[R2+0x13][31:0] = {PC[10:0],0[2:0],Label[1:0],
,→Rsrc[15:0]}
2: .data //Data section definition
Addr1: .word 123 // Define label Addr1 16 bit
.set offs, 0x00 // Define constant offs
.text //Text section definition
MOVE
R1, 1 // R1 = 1
MOVE R2, Addr1 // R2 = Addr1
STO offs
STI32 R1, R2, 1// MEM[R2 + 0] = {PC[10:0],0[2:0],Label[1:0],
,→Rsrc[15:0]}
// MEM[Addr1 + 0] will be 32'h00010001
ST32 R1, R2, 1// MEM[R2 + 1] = {PC[10:0],0[2:0],Label[1:0],
,→Rsrc[15:0]}
// MEM[Addr1 + 1] will be 32'h00010001
LDL/LD –Load data from low part of the 32-bits memory
Syntax LD Rdst, Rsrc, offset LDL Rdst, Rsrc, offset
Operands Rdst –Register R[0..3], destination
Rsrc –Register R[0..3], holds address of destination, in 32-bit words
Offset –13-bit signed value, offset in bytes
Cycles 4 cycles to execute, 4 cycles to fetch next instruction
Description The instruction loads lower 16-bit half-word from memory with address Rsrc+offset into the destination
register Rdst:
Espressif Systems 1484
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