Test Descriptions
3.7
TEST
SECTION
7
March Ones and
Zeros
Test
Step 71. March Ones/Zeros
--
This step marches first ones
and
then
zeros through each 32K
-byte
block
of
memory. Each
32K-byte
block
of
memory is
written
to all zeros. Then each location
is
read
for a zero
and
then
written
to
all ones. When
the
block contains all ones,
the
process
is
repeated
by reading each location
for
all ones and
then
writing a zero. The error latch
is
checked
after
each 3
2K
- byte block
of
memory
is
completed.
SEP 84
3-10
The following
error
messsage will
be
displayed only
is
error
correction
is
NOT working:
Expected:
XXXXXX;Received:
YYYYYY
Address:
%ZZZZZZ
Bank = W
Board = A
Where: XXXXXX = data expected in octal
YYYYYY
= data received in octal
ZZZZZZ
= address
of
error
in octal 0 < = Z < = I
7777-
W = bank
with
error
0 < = W < =
31
A=
0/1
The
error
latch information will be displayed
if
an
error
was detected during
the
test.
Bad
memory chips are identified only by the
error
latch information.
Single-bit
error
detected
Board: X
Syndrome
Code:
%YYY
Chip
Number:
UZZZZ
Where: X
'"
0/1
YYY
= octal syndrome code
UZZZZ
= Reference Designator of faulty RAM
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