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HP Series 37 - General Information; Introduction and System Requirements

HP Series 37
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GENERAL INFORMATION
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---ll~
INTRODUCTION
This manual describes the Self Test for the HP 3000 Series
37
in
both
power-on
(PON) mode
and
maintenance mode.
The Self Test
is
the primary
turn-on
test.
It
tests for a functioning CPU, Memory, Termianl Interface
Controllers (TICs), Peripheral Interface Channels
(PICs),
and Synchronous Intermodule Bus
(SIMB).
Self
Test ')Jill also verify the cold load path.
The TIC
is
part
of the Advanced Terminal Processor for the Series
37
(ATP37).
Self Test executes when any
of
the following happens:
power-on
via the keyswitch
invoked by the operator while in maintenance mode
restart
after
power failure
REQUIRED HARDWARE
The minimum hardware required to
run
Self Test to completion
is
a console (connected to TIC channel
l!port
0)
and the HP
3000
Series
37
which includes:
CPU
Memory
TIC
The
power-on
self test sequence
is
CPU, Memory, TIC, and PIC. If a required peripheral
is
not connected,
all tests performed before
that
peripheral
is
required
are
valid.
To
use
certain features
of
the Softpanel a breakpoint board
is
required.
SELF
TEST
ROM CODE
The ROM code
is
made up
of
three
sUbsets:
executable ROM code
and
two types of loadable ROM code -
executable code and ROM-based messages.
The executable
ROM code loads the first series of self tests from loadable ROM t 'Jde into Writable Control
Store
(WCS)
upon power-on. Control
is
then passed to the code loaded
into
WCS.
NOV 84
1-1

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