Chapter 6 Function Introduction Shenzhen Hpmont Technology Co., Ltd
―98― HD30 Series Inverters User Manual
No. Name Description Range
factory setting
22: Timing function output. If the setting is 22, the inverter can use the timing function output terminal.
• Refer to parameters F15.25 and F15.26.
23: Preset counting value reach.
24: Indicating counting value reach.
• Refer to parameters F15.37 and F15.38.
25: Setting length arrive. The indicating signal will be output if the inverter’s actual length reaches the
preset length.
26: Indication of motor 1 and motor 2. According to the current motor selection, output corresponding
indicating signal.
• When the inverter controls the motor 1, this signal will be disabled; while controls the motor 2, it
will output the indicating signal.
27,28: Reserved.
29: Undervoltage lock-up signal (LU). When the DC bus voltage is lower than the undervoltage
threshold, the inverter will output undervoltage signal.
• The LED on the display panel will display “-Lu-”.
30: Overload signal (OL). The indicating signal can be output when the inverter’s output current value
is higher than that defined by F20.01(overload pre-alarm detection threshold) and the overload time is
longer than that defined by F20.02 (overload pre-alarm detection time).
31: Inverter fault. The inverter will output fault signal when it has a fault.
32: External fault. The indicating signal can be output when the inverter detects the external fault
signal via terminal.
33: Inverter auto-reset fault. The indicating signal can be output when the inverter is during fault
auto-reset.
34: Three-phase power supply forward input. The indicating signal can be output when the inverter’s
three-phase input power supply is forward.
• Power supply forward: L1 (R) preceding L2 (S) preceding L3 (T).
35: Dormancy instruction function.
36－37: Reserved.
38: High-frequency output (only DO2). DO2 can be selected as high-frequency output.
• Refer to parameter F16.21.
Note: Only when using HD30-EIO will F15.21
F15.23 be enabled.
Output terminal positive and negative logic selection
It defines that each bit (binary) of this function represents different physical sources.
• Positive logic: When multi-function output terminals are connected to corresponding common port,
this logic is enabled. Otherwise the logic is disabled.
• Negative logic: When multi-function output terminals are connected to corresponding common
port, this logic is disabled. Otherwise the logic is enabled.
Tens Units
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
- - RLY4 RLY3 RLY2 RLY1 DO2 DO1
Note: Only when using HD30-EIO will RLY2
RLY4 be enabled.
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