Intel
®
EP80579 Integrated Processor with Intel
®
QuickAssist Technology—Technical Reference
Development Kit User’s Guide October 2008
40 Order Number: 320067-002US
89 HSS_JTAG_TDI 90 RST_N
91 HSS_JTAG_TDO 92 HSS_TXFRAME_y
3
93 HSS_JTAG_TMS 94 HSS_TXCLK_y
3
95 GND 96 HSS_TXDATA_y
3
97 HSS_TXDATA_x
2
98 GND
99 HSS_TXFRAME_x
2
100 HSS_RXDATA_x
2
101 NC 102 HSS_RXFRAME_x
2
103 HSS_TXCLK_x
2
104 NC
105 GND 106 HSS_RXCLK_x
2
107 NC 108 GND
109 HSS_RXCLK_y
3
110 NC
111 HSS_RXFRAME_y
3
112 HSS_RXDATA_y
3
113 12V 114 2.5V
115 12V 116 2.5V
117 12V 118 2.5V
119 12V 120 2.5V
1. n is the HSS mezzanine slot number. All HSSn_GPIO_[2:0] signals are routed to FPGA.
2. x is the primary HSS port signal.
3. y is the secondary HSS port signal.
4. i is 4, 5, and 6 for mezzanine 0, 1 and 2 respectively.
Table 20. Expansion Mezzanine Connector (Sheet 1 of 3)
Pin Name Pin Name
1 1.8V 2 1.8V
3GND 4GND
5HSSn
1
_GPIO_0 6 HSSn
1
_GPIO_1
7HSSn
1
_GPIO_2 8 HSSn
1
_GPIO_3
9GND 10GND
11 HSSn
1
_GPIO_4 12 HSSn
1
_GPIO_5
13 HSSn
1
_GPIO_6 13 HSSn
1
_GPIO_7
15 GND 16 GND
17 HSSn
1
_GPIO_8 18 HSSn
1
_GPIO_9
19 HSSn
1
_GPIO_10 20 HSSn
1
_GPIO_11
21 GND 22 GND
23 HSSn
1
_GPIO_12 24 HSSn
1
_GPIO_13
25 HSSn
1
_GPIO_14 26 HSSn
1
_GPIO_15
27 GND 28 GND
29 EX_ADDR_24 30 SSPS_CLK
31 SSPS_FRM 32 SSPS_TXD
33 SSPS_RXD 34 SSPC_EXTCLK
35 5V 36 5V
Table 19. Standard Mezzanine Connector Pinout (Sheet 3 of 3)
Pin Name Pin Name
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