A HARDWARE REFERENCE
3-7
NOTE:
Both SIMM modules must be installed; SIMM sockets cannot be empty.
The board has no shunts or switches to change for a memory upgrade. Memory speed is indicated by the
Presence Detect Signals; the DRAM controller automatically adjusts to minimum wait states for the
processor frequency and memory speeds. The initialization code automatically sizes the memory so
user software can take advantage of larger memory modules.
3.5 FLASH MEMORY
The Cyclone EP provides two banks of Flash memory: a primary memory bank on the CPU module and
an expansion bank on the base board. The default configuration of this memory is as the boot memory
containing the MON960 monitor. The second bank of memory is two sockets for Intel 28F020 devices
(Intel part number N28F020-200) in locations U22 and U27. These memory devices may be used for
user application code, or using the SwapROM switch, as boot memory.
3.5.1 SwapROM Switch
The SwapROM switch (third switch on SW1) exchanges the addresses of the CPU module boot ROM
and the expansion ROMs to allow the processor to boot from the expansion ROM. Table 3-6 shows the
address of the Flash ROMs relative to the SwapROM switch. Figure 3-1 shows SW1 switch location.
NOTE:
This feature is supported for all i960 processors except for Kx and Sx processors. These must
boot from boot ROMs and, therefore, must have the SwapROM switch set to OFF.
If a single Expansion ROM is used as a Boot ROM, use location U27 (ROM1) so the i960 processor
finds the IBR at the top of the memory map.
Table 3-5. DRAM SIMM Configurations
Total Memory (both modules) Module Type
2 Mbytes 256K x 32 (1 Mbyte)
8 Mbytes 1M x 32 (4 Mbytes)
32 Mbytes 4M x 32 (16 Mbytes)
Table 3-6. Flash ROM Addresses
ROM Type SwapROM Switch OFF SwapROM Switch ON
CPU Module Boot ROM F000 0000H E000 0000H
Expansion ROM0 (U22) E000 0000H F000 0000H
Expansion ROM1 (U27) E004 0000H F004 0000H
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