Intel S1200V3RP - Page 246

Appendix B: Integrated BMC Sensor Tables Intel® Server Board S1200V3RP TPS
Revision 1.2
232
Full Sensor
Name
(Sensor name
in SDR)
Se
ns
or
#
Platform
Applicabilit
y
Sensor
Type
Event/R
eading
Type
Event Offset Triggers
Contrib.
To
System
Status
Assert
/De-
assert
Reada
ble
Value/
Offset
s
Event
Data
Rearm
St
an
db
y
Power
Supply 1
Fan
Tachometer
1
(PS1 Fan
Tach 1)
A
0h
Chassis-
specific
Fan
04h
Generi
c –
digital
discret
e
01 – State Asserted
Non-
fatal
As
and
De
-
Trig
Offset
M
-
Power
Supply 1
Fan
Tachometer
2
(PS1 Fan
Tach 2)
A
1h
Chassis-
specific
Fan
04h
Generi
c –
digital
discret
e
01 – State Asserted
Non-
fatal
As
and
De
-
Trig
Offset
M
-
Power
Supply 2
Fan
Tachometer
1
(PS2 Fan
Tach 1)
A
4h
Chassis-
specific
Fan
04h
Generi
c –
digital
discret
e
01 – State Asserted
Non-
fatal
As
and
De
-
Trig
Offset
M
-
Power
Supply 2
Fan
Tachometer
2
(PS2 Fan
Tach 2)
A
5h
Chassis-
specific
Fan
04h
Generi
c –
digital
discret
e
01 – State Asserted
Non-
fatal
As
and
De
-
Trig
Offset
M
-
Processor 1
DIMM
Aggregate
Thermal
Margin 1
(P1 DIMM
Thrm
Mrgn1)
B
0h
All
Temper
ature
01h
Thresh
old
01h
[u,l] [c,nc]
nc =
Degrad
ed
c =
Non-
fatal
As
and
De
Analo
g
R, T
A
–
Processor 1
DIMM
Aggregate
Thermal
Margin 2
(P1 DIMM
Thrm
Mrgn2)
B
1h
All
Temper
ature
01h
Thresh
old
01h
[u,l] [c,nc]
nc =
Degrad
ed
c =
Non-
fatal
As
and
De
Analo
g
R, T
A
–
Processor 2
DIMM
Aggregate
Thermal
Margin 1
(P2 DIMM
Thrm
Mrgn1)
B
2h
All
Temper
ature
01h
Thresh
old
01h
[u,l] [c,nc]
nc =
Degrad
ed
c =
Non-
fatal
As
and
De
Analo
g
R, T
A
–