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Intel S1200V3RP Technical Product Specification

Intel S1200V3RP
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Intel® Server Board S1200V3RP TPS Glossary
Revision 1.2
255
Term
Definition
SDRAM
Synchronous dynamic random access memory
SEL
System event log
SHA1
Secure Hash Algorithm 1
SIO
Server Input/Output
SMBus*
A two-wire interface based on the I
2
C protocol. The SMBus* is a low-speed bus that provides positive
addressing for devices and bus arbitration.
SMI
Server management interrupt. SMI is the highest priority non-maskable interrupt.
SMM
Server management mode
SMS
Server management software
SNMP
Simple Network Management Protocol
SOL
Serial-over-LAN
SPT
Straight pass-through
SRAM
Static random access memory
UART
Universal asynchronous receiver and transmitter
UDP
User Datagram Protocol
UHCI
Universal Host Controller Interface
VLAN
Virtual local area network

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Intel S1200V3RP Specifications

General IconGeneral
BrandIntel
ModelS1200V3RP
CategoryServer Board
LanguageEnglish

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