Intel S1200V3RP - Page 8

Table of Contents Intel® Server Board S1200V3RP TPS
Revision 1.2
viii
13.1.5 Dynamic Loading ............................................................................................... 215
13.1.6 Capacitive Loading ............................................................................................. 215
13.1.7 Grounding .......................................................................................................... 215
13.1.8 Residual Voltage Immunity in Standy mode ....................................................... 215
13.1.9 Common Mode Noise ......................................................................................... 216
13.1.10 Ripple/Noise ....................................................................................................... 216
13.1.11 Timing Requirements ......................................................................................... 216
Appendix A: Integration and Usage Tips ............................................................................ 219
Appendix B: Integrated BMC Sensor Tables ....................................................................... 220
Appendix C: POST Code Diagnostic LED Decoder ............................................................ 239
Appendix D: POST Code Errors ........................................................................................... 245
Appendix E: Supported Intel
®
Server Chassis .................................................................... 252
Glossary ................................................................................................................................ 253
Reference Documents .......................................................................................................... 256