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Status Structure 13-17

Event enable registers

As Figure 13-1 shows, each status register set has an enable register. Each event register bit

is logically ANDed (&) to a corresponding enable bit of an enable register. Therefore, when an

event bit is set and the corresponding enable bit is set (as programmed by the user), the output

(summary) of the register will set to 1, which in turn sets the summary bit of the status byte

The commands to program and read the event enable registers are listed in Table 13-6. For

details on programming and reading registers, see “Programming enable registers” and “Read-

ing registers”.

NOTE The bits of any enable register can be reset to 0 by sending the 0 parameter value

with the appropriate enable command (i.e. STATus:OPERation:ENABle 0).

Table 13-6

Common and SCPI commands — event enable registers

Command Description

*ESE <NDN> or <NRf> Program standard event enable register (see “Parameters”).

*ESE? Read standard event enable register.

STATus STATus subsystem:

:OPERation Operation event enable register:

:ENABle <NDN> or <NRf> Program enable register (see “Parameters”).

:ENABle? Read enable register.

:MEASurement Measurement event enable register:

:ENABle <NDN> or <NRf> Program enable register (see “Parameters”).

:ENABle? Read enable register.

:QUEStionable Questionable event enable register:

:ENABle <NDN> or <NRf> Program enable register (see “Parameters”).

:ENABle? Read measurement event enable register:

Parameters:

<NDN> = #Bxx…x Binary format (each x = 1 or 0)

= #Hx Hexadecimal format (x = 0 to FFFF)

= #Qx Octal format (x = 0 to 177777)

<NRf> = 0 to 65535 Decimal format

Note: Power-up and STATus:PRESet resets all bits of all enable registers to 0. *CLS has no effect.

Keithley 6514 User Manual

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