PPC600 Family Debugger | 14
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PowerPC 600 Family Specific Implementations
Breakpoints
There are two types of breakpoints available: Software breakpoints (SW-BP) and on-chip breakpoints.
Software Breakpoints
Software breakpoints are the default breakpoints. They can only be used in RAM areas. There is no
restriction in the number of software breakpoints. Please consider that setting a large number of software
breakpoints will reduce the debug speed.
For software breakpoint functionality, the debugger must set an on-chip breakpoint to the program interrupt
address. In some applications, especially during the target initialization stage, some applications have
interrupts disabled and use the interrupt address range for non-interrupt code. In this situation, there are two
possible workarounds:
• Configure CPU and debugger to use the interrupt addresses that are not used at this stage. This
can be done by setting MSR_IP. Please note that the target application can modify this value any
time.
• Force on-chip breakpoints to a different address until target initialization is finished. E.g. set the
on-chip breakpoint to the address where the code at the interrupt addresses is not executed
anymore. If this point is reached, clear the on-chip breakpoint and continue debugging. If the
used CPU has more than one on-chip breakpoint, set the second breakpoint to an unused
address
All Since this CPU can only be stopped by an on-chip breakpoint,
TRACE32-ICD sets an on-chip breakpoint to the Trap exception
handler, whenever a software breakpoint is used. Because of that,
software breakpoints can not be used if all on-chip breakpoints are
directly used.
MPC60X, MPC7XX,
MPC824X/6X, MPC74XX,
MPC5100, MPC86XX
The current exception position must be known by the debugger at
that time the SW-BP take place. See also SYStem.Option.IP.
MPC512X,
MPC5200,MPC8280,
MPC827X,MPC8247,
MPC8248, MPX83XX
CPUs with at least two on-chip breakpoints can use
SYStem.Option.IP BOTH. The debugger will set on-chip
breakpoints to both interrupt addresses.
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