PPC600 Family Debugger | 37
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SYStem.Option.DCREAD Read from data cache
Data.dump windows for access class D: displays the memory value from the data caches if valid. If no valid
data is found in the caches, the physical memory will be read. If supported by the CPU unified L2/L3 caches
will also be used if this system option is enabled
The following table describes how DCREAD and ICREAD influence the behavior of the debugger
commands that are used to display memory.
SYStem.Option.DUALPORT Implicitly use run-time memory access
Forces all list, dump and view windows to use the access class E: (e.g. Data.dump E:0x100) or to use the
format option %E (e.g. Var.View %E var1) without being specified. Use this option if you want all windows to
be updated while the processor is executing code. This setting has no effect if
SYStem.Option.MemAccess is disabled or real-time memory access not available for used CPU.
Please note that while the CPU is running, MMU address translation can not be accesses by the debugger.
Only physical addresses accesses are possible. Use the access class modifier “A:” to declare the access
physical addressed, or declare the address translation in the debugger-based MMU manually using
TRANSlation.Create.
Format: SYStem.Option.DCREAD [ON | OFF]
If caching is disabled via the appropriate hardware registers (HID0 for PPC603
Series) or cache is invalid, read and writes from/to memory will directly reflect to
contents of physical memory even if a cache access class is selected.
DC: IC: NC: D: P:
ICREAD off
DCREAD off
D-Cache I-Cache phys. mem. phys. mem. phys. mem.
ICREAD on
DCREAD off
D-Cache I-Cache phys. mem. phys. mem. I-Cache
ICREAD off
DCREAD on
D-Cache I-Cache phys. mem. D-Cache phys. mem.
ICREAD on
DCREAD on
D-Cache I-Cache phys. mem. D-Cache I-Cache
Format: SYStem.Option.DUALPORT [ON | OFF]
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