EasyManuals Logo

Lauterbach TRACE32-ICD User Manual

Lauterbach TRACE32-ICD
65 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #40 background imageLoading...
Page #40 background image
PPC600 Family Debugger | 40
©
1989-2022 Lauterbach
SYStem.Option.HRCWOVerRide Override HRCW on SYStem.Up
MPC83XX and MPC512X only. Override the HRCW on SYStem.Up via JTAG. To disable this system option,
call without parameter. This command is usually required to connect to a processor with erased/empty flash
(HRCW not set).
Usage:
SYStem.Option.ICFLUSH Invalidate instruction cache before go/step
Format: SYStem.Option.HRCWOVerRide <value>
<value> Hard reset configuration word (64 bit) in the order
0xHHHHHHHHLLLLLLLL
NOTE:
The CPU will remember and use the overridden HRCW until the next
power cycle or power-on reset.
If JTAG_HRESET is connected to CPU_PORESET,
SYStem.Option.HRCWOVerRide will only work in conjunction with
SYStem.Option.ResetMode JTAG_HRST.
SYStem.CPU MPC8360
SYStem.Option.HRCWOVerRide 0x8060000004040006
SYStem.Up
SYStem.Option.HRCWOVerRide
; select CPU
; desired HRCW
; reset processor
; disable HRCW
; override
Format: SYStem.Option.ICFLUSH [ON | OFF]
ON Invalidates the instruction cache before starting the target program (Step or
Go).
OFF Write accesses by the debugger to the memory of the class P: are
performed in the instruction cache and the memory.

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Lauterbach TRACE32-ICD and is the answer not in the manual?

Lauterbach TRACE32-ICD Specifications

General IconGeneral
BrandLauterbach
ModelTRACE32-ICD
CategoryComputer Accessories
LanguageEnglish

Related product manuals