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Lauterbach TRACE32-ICD - System.Option.IP: Set MSR_IP for Breakpoints; System.Option.LittleEnd: True Little Endian Mode; System.Option.MemProtect: Enable Memory Access Safeguard

Lauterbach TRACE32-ICD
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PPC600 Family Debugger | 42
©
1989-2022 Lauterbach
SYStem.Option.IP Set MSR_IP value for breakpoints / SYStem.Up
This option is used by the debugger to use the correct exception handler for the software breakpoints. See
also Software Breakpoints.
SYStem.Option.LittleEnd True little endian mode
Enable this system option if the PowerPC core is operated in true little endian mode. If the CPU is operated
in modified (PowerPC) little endian mode, use command SYStem.Option.PPCLittleEnd.
To find out which mode is supported by the target processor, see Little Endian Operation.
SYStem.Option.MemProtect Enable memory access safeguard
PowerQuicc II (MPC824X, MPC826X, MPC827X, MPC8280) only.
This option can help to prevent a hanging memory bus caused by debugger accesses to unimplemented
memory. USe together with SYStem.Option.BASE AUTO.
Format: SYStem.Option.IP [0 | 1 | AUTO | BOTH]
AUTO Depend on the current/last state of the MSR[IP] bit the debugger uses
the lower or the higher exception handler.
0 Independent of the MSR[IP] the debugger uses the lower exception
handler at 0x00000700.
1 Independent of the MSR[IP] the debugger uses the higher exception
handler at 0xFFFF0700.
BOTH Use both exception handler addresses. Only available for CPUs with two
or more instruction address on-chip breakpoints (MPC8280, MPC83XX
and compatible).
Format: SYStem.Option.LittleEnd [ON | OFF]
Format: SYStem.Option.MemProtect [ON | OFF]

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