Lauterbach TRACE32-ICD - Software Breakpoints in Interrupt Handlers; Breakpoints in FLASH;ROM; Breakpoints on Physical vs. Virtual Addresses

PPC600 Family Debugger | 18
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Software Breakpoints in Interrupt Handlers
If software breakpoints are used in interrupt handlers, the registers SRR0 and SRR1 will be overwritten,
because software breakpoints also use SRR0/1. There are several ways to debug interrupt handlers without
corrupting SRR0/1:
• If MPC82XX, MPC5200 or RHPPC (G2_LE cores) is under debug, set SYStem.Option.NOTRAP
ILL.
• Use on-chip breakpoints. On-chip breakpoints will not corrupt SRR0/1. Please note that if only a
single on-chip instruction address breakpoint is available, using the on-chip breakpoint will
prevent using any further software breakpoints.
• Patch the interrupt handler, so that SRR0/1 are saved upon interrupt entry and restored before
interrupt exit. If the interrupt handler it patched that way, it is safe to use software breakpoints
after SRR0/1 have been saved.
Breakpoints in FLASH/ROM
If an instruction breakpoint is set, per default, the debugger tried to set a software breakpoint. If writing to the
breakpoint address failed, the debugger will set an on-chip breakpoint.
With the command MAP.BOnchip <range> it is possible to inform the debugger where you have ROM
(FLASH, EPROM) on the target. If a breakpoint is set within the specified address range, the debugger uses
automatically the available on-chip breakpoints. Use this command, if write accesses to a read-only memory
space are forbidden, e.g. because it could cause a reset etc.
Example:
Breakpoints on Physical or Virtual Addresses
On-chip breakpoints of almost all PPC603 based processors have a TE bit to configure if the breakpoint
matches, if the access was performed on physical addresses (MSR_IR / MSR_DR off) of on virtual
addresses (MSR_IR / MSR_DR on). In order to match, the processor compares IABR_TE / DABR_TE with
MSR_IR for instruction and with MSR_DR for data accesses.
Per default, the debugger configures the breakpoints to match on physical addresses. In order to set the on-
chip breakpoints to virtual addresses, use the command TRANSlation.ON (Activate MMU translation).
This command will enable MMU support, including breakpoint configuration.
Software breakpoints hit on virtual addresses if MSR_IR is set, and on physical addresses if MSR_IR is not
set, regardless of any other configuration.
MAP.BOnchip 0xFF800000--0xFFFFFFFF