LPC5411x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 2.1 — 9 May 2018 17 of 105
NXP Semiconductors
LPC5411x
32-bit ARM Cortex-M4/M0+ microcontroller
PIO1_5/
ADC0_8
B3 19
[4]
PU I/O;
AI
PIO1_5/ADC0_8 — General-purpose digital input/output pin. ADC input channel 8 if
the DIGIMODE bit is set to 0 in the IOCON register for this pin.
I PDM1_DATA — Data for PDM interface 1, digital microphone input. Also PDM clock
input in bypass mode.
I/O FC7_CTS_SDA_SSEL0 — Flexcomm Interface 7: USART CTS, I2C SDA, SPI
SSEL0.
I CTimer1_CAP0 — 32-bit CTimer1 capture input 0.
R — Reserved.
O CTimer1_MAT3 — 32-bit CTimer1 match output 3.
R — Reserved.
O USB_FRAME — USB start-of-frame signal derived from host signaling.
PIO1_6/
ADC0_9
A5 26
[4]
PU I/O;
AI
PIO1_6/ADC0_9 — General-purpose digital input/output pin. ADC input channel 9 if
the DIGIMODE bit is set to 0 in the IOCON register for this pin.
Remark: This pin is also used as part of secondary selection of boot source for ISP
mode after device reset, in connection with PIO0_31 and PIO0_4. See the Boot
Process chapter in UM10914 for more details.
R — Reserved.
I/O FC7_SCK — Flexcomm Interface 7: USART, SPI, or I2S clock.
I CTimer1_CAP2 — 32-bit CTimer1 capture input 2.
R — Reserved.
O CTimer1_MAT2 — 32-bit CTimer1 match output 2.
R — Reserved.
I USB_VBUS — Monitors the presence of USB bus power. This signal must be HIGH
for USB reset to occur.
PIO1_7/
ADC0_10
B5 27
[4]
PU I/O;
AI
PIO1_7/ADC0_10 — General-purpose digital input/output pin. ADC input channel
10 if the DIGIMODE bit is set to 0 in the IOCON register for this pin.
R — Reserved.
I/O FC7_RXD_SDA_MOSI_DATA — Flexcomm Interface 7: USART RXD, I2C SDA,
SPI MOSI, I2S DATA.
O CTimer1_MAT2 — 32-bit CTimer1 match output 2.
R — Reserved.
I CTimer1_CAP2 — 32-bit CTimer1 capture input 2.
PIO1_8/
ADC0_11
C5 28
[4]
PU I/O;
AI
PIO1_8/ADC0_11 — General-purpose digital input/output pin. ADC input channel 11
if the DIGIMODE bit is set to 0 in the IOCON register for this pin.
R — Reserved.
I/O FC7_TXD_SCL_MISO_WS — Flexcomm Interface 7: USART TXD, I2C SCL, SPI
MISO, I2S WS.
O CTimer1_MAT3 — 32-bit CTimer1 match output 3.
R — Reserved.
I CTimer1_CAP3 — 32-bit CTimer1 capture input 3.
Table 4. Pin description
…continued
Symbol
49-pin
64-pin
Reset state
[1]
Type
Description