MPC5777M Microcontroller Data Sheet, Rev. 6
NXP Semiconductors2
Table of Contents
1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.1 Document overview . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.3 Device feature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
2 Package pinouts and signal descriptions . . . . . . . . . . . . . . . .10
2.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
2.2 Pin/ball descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . .15
2.2.1 Power supply and reference voltage pins/balls .15
2.2.2 System pins/balls. . . . . . . . . . . . . . . . . . . . . . . .16
2.2.3 LVDS pins/balls . . . . . . . . . . . . . . . . . . . . . . . . .17
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
3.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . .21
3.3 Electrostatic discharge (ESD). . . . . . . . . . . . . . . . . . . .23
3.4 Operating conditions. . . . . . . . . . . . . . . . . . . . . . . . . . .23
3.5 DC electrical specifications. . . . . . . . . . . . . . . . . . . . . .27
3.6 I/O pad specification . . . . . . . . . . . . . . . . . . . . . . . . . . .30
3.6.1 I/O input DC characteristics. . . . . . . . . . . . . . . .31
3.6.2 I/O output DC characteristics. . . . . . . . . . . . . . .35
3.7 I/O pad current specification . . . . . . . . . . . . . . . . . . . . .42
3.8 Reset pad (PORST, ESR0) electrical characteristics . .45
3.9 Oscillator and FMPLL . . . . . . . . . . . . . . . . . . . . . . . . . .48
3.10 ADC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . .53
3.10.1 ADC input description . . . . . . . . . . . . . . . . . . . .53
3.10.2 SAR ADC electrical specification. . . . . . . . . . . .54
3.10.3 S/D ADC electrical specification . . . . . . . . . . . .58
3.11 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . .67
3.12 LVDS Fast Asynchronous Serial Transmission
(LFAST) pad electrical characteristics . . . . . . . . . . . . .67
3.12.1 LFAST interface timing diagrams . . . . . . . . . . .68
3.12.2 LFAST and MSC/DSPI LVDS interface
electrical characteristics . . . . . . . . . . . . . . . . . .69
3.12.3 LFAST PLL electrical characteristics . . . . . . . . .72
3.13 Aurora LVDS electrical characteristics . . . . . . . . . . . . .73
3.14 Power management: PMC, POR/LVD, sequencing . . .75
3.14.1 Power management electrical characteristics . .75
3.14.2 Power management integration . . . . . . . . . . . . 75
3.14.3 3.3 V flash supply. . . . . . . . . . . . . . . . . . . . . . . 76
3.14.4 Device voltage monitoring . . . . . . . . . . . . . . . . 77
3.14.5 Power up/down sequencing . . . . . . . . . . . . . . . 79
3.15 Flash memory electrical characteristics. . . . . . . . . . . . 80
3.15.1 Flash memory program and erase
specifications . . . . . . . . . . . . . . . . . . . . . . . . . . 80
3.15.2 Flash memory FERS program and
erase specifications . . . . . . . . . . . . . . . . . . . . . 82
3.15.3 Flash memory Array Integrity and Margin
Read specifications . . . . . . . . . . . . . . . . . . . . . 83
3.15.4 Flash memory module life specifications . . . . . 84
3.15.5 Data retention vs program/erase cycles. . . . . . 84
3.15.6 Flash memory AC timing specifications . . . . . . 85
3.15.7 Flash read wait state and address pipeline
control settings. . . . . . . . . . . . . . . . . . . . . . . . . 85
3.16 AC specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
3.16.1 Debug and calibration interface timing. . . . . . . 86
3.16.2 DSPI timing with CMOS and LVDS pads . . . . . 94
3.16.3 FEC timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
3.16.4 FlexRay timing . . . . . . . . . . . . . . . . . . . . . . . . 115
3.16.5 PSI5 timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 118
3.16.6 UART timing. . . . . . . . . . . . . . . . . . . . . . . . . . 118
3.16.7 External Bus Interface (EBI) Timing. . . . . . . . 119
3.16.8 I2C timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
3.16.9 GPIO delay timing . . . . . . . . . . . . . . . . . . . . . 124
3.16.10Package characteristics. . . . . . . . . . . . . . . . . 124
3.17 416 TEPBGA (production) case drawing . . . . . . . . . 125
3.18 416 TEPBGA (emulation) case drawing. . . . . . . . . . 127
3.19 512 TEPBGA case drawing . . . . . . . . . . . . . . . . . . . 130
3.20 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . 132
3.20.1 General notes for specifications at
maximum junction temperature . . . . . . . . . . . 132
4 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
5 Document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . 137