NXP Semiconductors MPC5777M - LVDS Fast Asynchronous Serial Transmission (LFAST) pad electrical characteristics

MPC5777M Microcontroller Data Sheet, Rev. 6
Electrical characteristics
NXP Semiconductors66
3.11 Temperature sensor
The following table describes the temperature sensor electrical characteristics.
3.12 LVDS Fast Asynchronous Serial Transmission (LFAST) pad
electrical characteristics
The LFAST pad electrical characteristics apply to both the SIPI and high-speed debug serial interfaces on the device. The same
LVDS pad is used for the Microsecond Channel (MSC) and DSPI LVDS interfaces, with different characteristics given in the
following tables.
13
Impedance given at F
ADCD_M
= 16 MHz. Impedance is inversely proportional to SDADC clock frequency.
Z
DIFF
(F
ADCD_M
) = (16 MHz / F
ADCD_M
) * Z
DIFF
, Z
CM
(F
ADCD_M
) = (16MHz / F
ADCD_M
) * Z
CM
.
14
Input impedance in single-ended mode Z
IN
= (2 * Z
DIFF
* Z
CM
) / (Z
DIFF
+ Z
CM
).
15
Impedance given at F
ADCD_M
= 16 MHz. Impedance is inversely proportional to SDADC clock frequency.
Z
DIFF
(F
ADCD_M
) = (16 MHz / F
ADCD_M
) * Z
DIFF
, Z
CM
(F
ADCD_M
) = (16MHz / F
ADCD_M
) * Z
CM
.
16
Vintcm is the common mode input reference voltage for the SDADC, and has a nominal value of (V
DD_HV_ADC
-
V
SS_HV_ADC
) / 2.
17
SNR values guaranteed only if external noise on the ADC input pin is attenuated by the required SNR value in the
frequency range of f
ADCD_M
– f
ADCD_S
to f
ADCD_M
+ f
ADCD_S
, where f
ADCD_M
is the input sampling frequency, and
f
ADCD_S
is the output sample frequency. A proper external input filter should be used to remove any interfering signals
in this frequency range.
18
The ±1% passband ripple specification is equivalent to 20 * log
10
(0.99) = 0.087 dB.
19
Propagation of the information from the pin to the register CDR[CDATA] and flags SFR[DFEF], SFR[DFFF] is given by
the different modules that need to be crossed: delta/sigma filters, high pass filter, fifo module, clock domain
synchronizers. The time elapsed between data availability at pin and internal S/D module registers is given by the
below formula:
REGISTER LATENCY = tLATENCY + 0.5/fADCD_S + 2 (~+1)/fADCD_M + 2(~+1)fPBRIDGEx_CLK
where fADCD_S is the frequency of the sampling clock, fADCD_M is the frequency of the modulator, and
fPBRIDGEx_CLK is the frequency of the peripheral bridge clock feeds to the ADC S/D module. The (~+1) symbol
refers to the number of clock cycles uncertainty (from 0 to 1 clock cycle) to be added due to resynchronization of the
signal during clock domain crossing.
Some further latency may be added by the target module (core, DMA, interrupt) controller to process the data received
from the ADC S/D module.
20
This capacitance does not include pin capacitance, that can be considered together with external capacitance, before
sampling switch.
Table 29. Temperature sensor electrical characteristics
Symbol Parameter Conditions
Value
Unit
Min Typ Max
— CC Temperature monitoring range — –40 — 150 °C
T
SENS
CC Sensitivity — — 5.18 — mV/°C
T
ACC
CC Accuracy T
J
 150 °C –3 — 3 °C
I
TEMP_SENS
CC V
DD_HV_ADV_S
power supply
current
———700µA