NXP Semiconductors MPC5777M - Oscillator and FMPLL

Electrical characteristics
MPC5777M Microcontroller Data Sheet, Rev. 6
NXP Semiconductors 47
3.9 Oscillator and FMPLL
The Reference PLL (PLL0) and the System PLL (PLL1) generate the system and auxiliary clocks from the main oscillator
driver.
Figure 12. PLL integration
Table 21. PLL0 electrical characteristics
Symbol Parameter Conditions
Value
Unit
Min Typ Max
f
PLL0IN
SR PLL0 input clock
1,2
—8—44MHz

PLL0IN
SR PLL0 input clock duty cycle
2
—40—60%
f
PLL0VCO
CC PLL0 VCO frequency — 600 — 1250 MHz
f
PLL0VCOFR
CC PLL0 VCO free running
frequency
—35—400MHz
f
PLL0PHI
CC PLL0 output frequency — 4.762 — 400 MHz
t
PLL0LOCK
CC PLL0 lock time — — — 110 µs

PLL0PHISPJ
| CC PLL0_PHI single period jitter
3
fPLL0IN = 20 MHz (resonator)
f
PLL0PHI
= 400 MHz,
6-sigma
——200ps

PLL0PHI1SPJ
| CC PLL0_PHI1 single period jitter
3
fPLL0IN = 20 MHz (resonator)
f
PLL0PHI1
= 40 MHz,
6-sigma
— — 300
4
ps
PLL0
PLL1
RCOSC
XOSC
PLL0_PHI1
PLL0_PHI
PLL1_PHI