NXP Semiconductors MPC5777M - Operating conditions

MPC5777M Microcontroller Data Sheet, Rev. 6
Electrical characteristics
NXP Semiconductors22
3.3 Electrostatic discharge (ESD)
The following table describes the ESD ratings of the device.
3.4 Operating conditions
The following table describes the operating conditions for the device for which all specifications in the data sheet are valid,
except where explicitly noted.
The device operating conditions must not be exceeded or the functionality of the device is not guaranteed.
9
Includes ADC supplies V
DD_HV_ADV_S and
V
DD_HV_ADV_D
. V
DD_HV_ADV_S
is also the supply for the device
temperature sensor, RCOSC, and bandgap reference.
10
Includes ADC low references V
SS_HV_ADR_S
and V
SS_HV_ADR_D
.
11
Includes ADC high references V
DD_HV_ADR_S
and V
DD_HV_ADR_D
.
12
The maximum input voltage on an I/O pin tracks with the associated I/O supply maximum. For the injection current
condition on a pin, the voltage equals the supply plus the voltage drop across the internal ESD diode from I/O pin to
supply. The diode voltage varies significantly across process and temperature, but a value of 0.3V can be used for
nominal calculations.
13
V
DD_HV_IO
/V
SS_HV_IO
refers to supply pins and corresponding grounds: V
DD_HV_IO_MAIN
, V
DD_HV_IO_FLEX
,
V
DD_HV_IO_JTAG
, V
DD_HV_OSC
, V
DD_HV_FLA.
14
Relative value can be exceeded if design measures are taken to ensure injection current limitation (parameters I
INJD
and I
INJA
).
15
Sum of all controller pins (including both digital and analog) must not exceed 200 mA. A V
DD_HV_IO
power segment
is defined as one or more GPIO pins located between two V
DD_HV_IO
supply pins.
16
Solder profile per IPC/JEDEC J-STD-020D
17
Moisture sensitivity per JEDEC test method A112
18
Three Screen done, 1 minute each. No change in device parameters during characterization of at least 10 devices at
30 minutes exposure of 150 KeV at maximum 5 mm.
Table 7. ESD ratings
1,2
1
All ESD testing is in conformity with CDF-AEC-Q100 Stress Test Qualification for Automotive Grade Integrated
Circuits.
2
Device failure is defined as: “If after exposure to ESD pulses, the device does not meet the device specification
requirements, which includes the complete DC parametric and functional testing at room temperature and hot
temperature. Maximum DC parametrics variation within 10% of maximum specification”
Parameter Conditions Value Unit
ESD for Human Body Model (HBM)
3
3
This parameter tested in conformity with ANSI/ESD STM5.1-2007 Electrostatic Discharge Sensitivity Testing
All pins 2000 V
ESD for field induced Charged Device Model (CDM)
4
4
This parameter tested in conformity with ANSI/ESD STM5.3-1990 Charged Device Model - Component Level
All pins 500 V
Table 8. Device operating conditions
1
Symbol Parameter Conditions
Value
Unit
Min Typ Max
Frequency
f
SYS
SR Device operating
frequency
2
T
J
40 °C to 150 °C — — 300 MHz