NXP Semiconductors MPC5777M - Page 65

Electrical characteristics
MPC5777M Microcontroller Data Sheet, Rev. 6
NXP Semiconductors 65
THD
SE150
CC Total Harmonic
Distortion,
Single-ended Mode,
150Ksps output rate
Gain = 1
4.5 V < V
DD_HV_ADV_D
< 5.5 V
V
DD_HV_ADR_D
= V
DD_HV_ADV_D
Tj < 150 °C
68 — — dBFS
Gain = 2
4.5 V < V
DD_HV_ADV_D
< 5.5 V
V
DD_HV_ADR_D
= V
DD_HV_ADV_D
Tj < 150 °C
68 — —
Gain = 4
4.5 V < V
DD_HV_ADV_D
< 5.5 V
V
DD_HV_ADR_D
= V
DD_HV_ADV_D
Tj < 150 °C
68 — —
Gain = 8
4.5 V < V
DD_HV_ADV_D
< 5.5 V
V
DD_HV_ADR_D
= V
DD_HV_ADV_D
Tj < 150 °C
68 — —
Gain = 16
4.5 V < V
DD_HV_ADV_D
< 5.5 V
V
DD_HV_ADR_D
= V
DD_HV_ADV_D
Tj < 150 °C
68 — —
1
Functional operating conditions are given in the DC electrical specifications. Absolute maximum ratings are stress
ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the listed maxima may affect
device reliability or cause permanent damage to the device.
2
For input voltage above the maximum and below the clamp voltage of the input pad, there is no latch-up concern, and
the signal will only be ‘clipped’.
3
V
INP
is the input voltage applied to the positive terminal of the SDADC.
4
V
INM
is the input voltage applied to the negative terminal of the SDADC.
5
When using a GAIN setting of 16, the conversion result will always have a value of zero in the least significant bit. The
gives an effective resolution of 15 bits.
6
Offset and gain error due to temperature drift can occur in either direction (+/-) for each of the SDADCs on the device.
7
Calibration of gain is possible when gain = 1.
Offset Calibration should be done with respect to 0.5*V
DD_HV_ADR_D
for differential mode and single ended mode with
negative input=0.5*V
DD_HV_ADR_D
.
Offset Calibration should be done with respect to 0 for "single ended mode with negative input=0".
Both offset and Gain Calibration is guaranteed for ±5% variation of V
DD_HV_ADR_D
, ±10% variation of V
DD_HV_ADV_D
,
and ± 50 °C temperature variation.
8
Conversion offset error must be divided by the applied gain factor (1, 2, 4, 8, or 16) to obtain the actual input referred
offset error.
9
S/D ADC is functional in the range 3.6 V – 4.5 V, SNR parameter degrades by 3 dB. Degraded SNR value based on
simulation.
10
S/D ADC is functional in the range 3.0 V –4.5 V, SNR parameter degrades by 9 dB. Degraded SNR value based on
simulation.
11
This parameter is guaranteed by bench validation with a small sample of typical devices, and tested in production to
a value of 6 dB less.
12
Input impedance in differential mode Z
IN
(input impedance) = Z
DIFF
.
Table 28. SDn ADC electrical specification
1
(continued)
Symbol Parameter Conditions
Value
Unit
Min Typ Max