77
Sequence Output Instructions
Section 3-2
DIFFERENTIATE
DOWN
DIFD
!DIFD
*1
014
Output
Required
SET
SET
@SET
%SET
!SET
*1
!@SET
*1
!%SET
*1
Output
Required
RESET
RSET
@RSET
%RSET
!RSET
*1
!@RSET
*1
!%RSET
*1
Output
Required
MULTIPLE BIT
SET
SETA
@SETA
530
Output
Required
MULTIPLE BIT
RESET
RSTA
@RSTA
531
Output
Required
SINGLE BIT SET
(CS1-H, CJ1-H,
CJ1M, or CS1D
only)
SETB
@SETB
!SETB
*1
!@SETB
*1
SETB(532) turns ON the specified bit in the specified word when the
execution condition is ON.
Unlike the SET instruction, SETB(532) can be used to set a bit in a DM
or EM word.
Output
Required
Instruction
Mnemonic
Code
Symbol/Operand Function Location
Execution condition
DIFD(014)
B
B: Bit
Status of B
One cycle
Execution condition
DIFD(014) turns the designated bit ON for one cycle when the
execution condition goes from ON to OFF (falling edge).
B: Bit
SET
B
Status of B
Execution condition
of SET
SET turns the operand bit ON when the execution condition is ON.
RSET
B
B: Bit
Status of B
RSET turns the operand bit OFF when the execution condition is ON.
Execution condition
of RSET
D
N1
N2
SETA(530)
D: Beginning word
N1: Beginning bit
N2: Number of
bits
N2 bits are set to 1
(ON).
SETA(530) turns ON the specified number of consecutive bits.
D: Beginning
word
N1: Beginning bit
N2: Number of
bits
D
N1
N2
RSTA(531)
RSTA(531) turns OFF the specified number of consecutive bits.
N2 bits are reset to 0
(OFF).
SETB(532)
D
N
D: Word address
N: Bit number