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REVISION HISTORY R8C/20 Group, R8C/21 Group Hardware Manual
0.20 Jun 28, 2006 76 10.4.1.3 Low-Speed On-Chip Oscillator Mode, on the 8th line;
“In this mode, ~ consumption operation.” added.
10.4.2.2 Entering Wait Mode revised.
10.4.2.3 Pin Status in Wait Mode revised.
77 10.4.2.4 Exiting Wait Mode revised.
Table 10.3 Interrupts to Exit Wait Mode and Usage Conditions;
CM02 = 1 of Timer RA Interrupt revised.
CM02 = 1 of Timer RD Interrupt revised.
78 Figure 10.9 Time from Wait Mode to Interrupt Routine Execution added.
82 Figure 10.11 Procedure for Switching Clock Source from Low-Speed
On-Chip Oscillator to XIN Clock revised.
83 Figure 10.12 Example of Determining Interrupt Source for Oscillation
Stop Detection, Watchdog Timer, Voltage Monitor 1, or Voltage Monitor
2 Interrupt revised.
84 10.6 Notes on Clock Generation Circuit revised.
86 Figure 12.1 Interrupts;
Address break (2) added.
90 Table 12.2 Relocatable Vector Tables;
“A0RIC” → “S0RIC” corrected.
96 Table 12.5 IPL Value When Software or Special Interrupt Is
Acknowledged;
“Address break” added.
98 Figure 12.10 Priority Levels of Hardware Interrupts;
“Address break” added.
109 12.6 Notes on Interrupts;
“12.6 Precautions on Interrupts” → “12.6 Notes on Interrupts” revised.
112 Figure 13.1 Block Diagram of Watchdog Timer;
“(“L”) active”, “PM12: Bit in PM1 register” added.
113 Figure 13.2 Registers OFS and WDC revised.
117 14. Timers;
“The count source for ~ counting and reloading” deleted.
118 Table 14.1 Functional Comparison of Timers;
Count source of Timer RD, “TRCIOA0” → “TRDIOA0” corrected.
119 14.1 Timer RA, the 5th line;
“The count source for ~ counting and reloading” added.
Figure 14.1 Block Diagram of Timer RA revised.
120 Figure 14.2 Registers TRACR and TRAIOC;
The TRAIOC register revised.
139 14.1.6 Notes on Timer RA;
“14.1.6 Precautions on Timer RA” → “14.1.6 Notes on Timer RA”
revised.
140 14.2 Timer RB, on the 5th line;
“The count source for timer RB ~ counting and reloading” added.
Figure 14.17 Block Diagram of Timer RB revised.
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