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Rohde & Schwarz SMIQ02B - Page 210

Rohde & Schwarz SMIQ02B
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SMIQ Digital Standard IS-95 CDMA
1125.5555.03 E-92.141
(TRIGGER...) TRIGGER SOURCE
Selection of trigger source.
EXT The CDMA chip sequence is started
from frame 1 by means of the active
slope of an external trigger signal.
The polarity, the trigger threshold and
the input resistance of the TRIGIN input
can be modified in menu DIGITAL
MOD - EXT INPUTS.
INT A trigger event is manually executed by
EXECUTE TRIGGER.
IEC/IEEE-bus :SOUR:IS95:TRIG:SOUR EXT
EXT TRIGGER
DELAY
Setting the number of chips (symbols) by which an
external trigger signal is delayed before it starts the
CDMA chip sequence.
This is used for setting the time synchroneity
between the DUT and other units.
IEC/IEEE-bus :SOUR:IS95:TRIG:DEL 3
EXT RETRIGGER
INHIBIT
Setting the number of chips for which a restart is
inhibited after a trigger event.
With TRIGGER MODE RETRIG selected, each new
trigger signal restarts the CDMA chip sequence. This
restart can be inhibited for the entered number of
chips (symbols).
Example:
The entry of 98000 symbols, for example, causes
new trigger signals to be ignored for the duration of
98000 chips after a trigger event.
IEC/IEEE-bus :SOUR:IS95:TRIG:INH 16000
TRIGGER OUT 1/2
Selection of signals for outputs TRIGOUT 1 and
TRIGOUT 2 of connector PARDATA.
All the times indicated are valid for a chip rate of
1.2288 Mcps.
TRAFFIC FRAME 20-ms frame clock
IEC :SOUR:IS95:OUTP1 TFR
SHORT SEQ
ROLLOVER 80/3-ms clock
IEC :SOUR:IS95:OUTP1 SSR
SUPER FRAME 80-ms clock
IEC :SOUR:IS95:OUTP1 SFR
EVEN SECOND 2-s clock
IEC :SOUR:IS95:OUTP1 ESEC
PCG power control group rate
IEC :SOUR:IS95:OUTP1 GATE

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