SMIQ Digital Standard 3GPP W-CDMA (FDD)
1125.5555.03 E-92.187
CLOCK SOURCE
Allows selection of the clock source for the chip clock
(see section 2.14.2.11).
INT The SMIQ operates with internally
generated clock signals.
EXT A chip clock has to be fed in externally at the
SYMBOL CLOCK connector. The CHIP
RATE parameter must be set with an
accuracy of ± 1 %. The polarity, the trigger
threshold and the input resistance of the
SYMBOL CLOCK input can be changed in
DIGITAL MOD - EXT INPUTS menu.
IEC/IEEE-bus command
:SOUR:W3GP:CLOC:SOUR INT
EXT CLOCK MODE
Selection of type of external chip signal.
CHIP chip clock
CHIPX4 Vierfacher Chiptakt
ATTENTION:
An external chip clock is fed in at connector
SYMBOL CLOCK. Multi-folds chip clock has to
be fed in at the connector BIT CLOCK!
IEC/IEEE bus command
:SOUR:W3GP:CLOCk:MODE CHIP4
CLOCK DELAY
Setting the delay of generated modulation signal to an
external clock. This can be used, for example, for syn-
chronization with a second unit to achieve time
synchroneity between the modulation signals of the
two units. The displayed setting resolution of
1/100 symbol is only attained for symbol-clock
frequencies below 100 kHz. The resolution is reduced
with increasing frequency. At a chip rate of
1.2288 Mcps, the resolution equals the chip duration ×
0.1.
IEC/IEEE-bus command
:SOUR:W3GP:CLOC:DEL 0.5
TOTAL POWER
Displays the total power of activated code channels.
The total power is calculated from the power ratio of the
activated code channels with the modulation switched
on (STATE=ON). If the value is not equal to 0 dB, the
individual code channels are internally adjusted (while
maintaining the power ratios) so that the TOTAL
POWER is 0 dB to obtain the output level (LEVEL) set
in the header of the display. In addition to the average
power, the peak envelope power (PEP) is also
displayed.
IEC/IEEE-bus command :SOUR:W3GP:POW?
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