EasyManua.ls Logo

Sun Microsystems Sun Fire X2100 - Page 108

Sun Microsystems Sun Fire X2100
134 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
B-4 Sun Fire X2100 Server User Guide April 2007
POST Code Description
25h Early PCI initialization:
Enumerate PCI bus number.
Assign memory and I/O resource.
Search for a valid VGA device and VGA BIOS, and put it into C000:0.
26h 1. If Early_Init_Onboard_Generator is not defined Onboard clock generator
initialization. Disable respective clock resource to empty PCI and DIMM
slots.
2. Init onboard PWM.
3. Init onboard H/W monitor devices.
27h Initialize INT 09 buffer.
28h Reserved.
29h 1. Program CPU internal MTRR (P6 and PII) for 0-640K memory address.
2. Initialize the APIC for Pentium class CPU.
3. Program early chipset according to CMOS setup. Example: onboard IDE
controller.
4. Measure CPU speed.
2Ah Reserved.
2Bh Invoke video BIOS.
2Ch Reserved.
2Dh 1. Initialize double-byte language font (optional).
2. Put information on screen display, including award title, CPU type, CPU
speed, full-screen logo.
2Eh Reserved.
2Fh Reserved.
30h Reserved.
31h Reserved.
32h Reserved.
33h Reset keyboard if Early_Reset_KB is defined- for example, Winbond 977
series Super I/O chips. See also POST 63h.
34h Reserved.
35h Test DMA Channel 0.
36h Reserved.
37h Test DMA Channel 1.
TABLE B-1 BIOS Port 80 POST Codes (Continued)

Table of Contents

Other manuals for Sun Microsystems Sun Fire X2100

Related product manuals