Registers
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RFRXFRD (0x61CB) – Rx FIFO Read Register
Bit
Name Reset R/W Description
No.
7:0
D
0x00 R
When this register is read, the data in Rx FIFO address offset RFRXFRP
from the start of the Rx FIFO area is returned (see Figure 25-1).
RFRXFRP (and RFRXFSRP if RFFCFG.RXAUTOCOMMIT = 1) is
incremented by 1 modulo 0x80 unless the read fails.
RFRXFWP (0x61CC) – Rx FIFO Write Pointer
Bit
Name Reset R/W Description
No.
7 – 0 R Reserved
6:0
D
000 R/W Rx FIFO write pointer. This is the offset into Rx FIFO the next write
0000 operation writes to.
RFRXFRP (0x61CD) – Rx FIFO Read Pointer
Bit
Name Reset R/W Description
No.
7 – 0 R Reserved
6:0
D
000 R/W Rx FIFO read pointer. This is the offset into Rx FIFO the next read
0000 operation reads from.
RFRXFSWP (0x61CE) – Rx FIFO Start-of-Frame Write Pointer
Bit
Name Reset R/W Description
No.
7 – 0 R Reserved
6:0
D
000 R/W Rx FIFO start of written package. This is the point to which the write
0000 pointer can be reset if a discard command is issued.
RFRXFSRP (0x61CF) – Rx FIFO Start-of-Frame Read Pointer
Bit
Name Reset R/W Description
No.
7 – 0 R Reserved
6:0
D
000 R/W Rx FIFO start of read package. This is the start of the allocated part of the
0000 Rx FIFO.
RFTXFLEN (0x61D0) – Tx FIFO Length
Bit
Name Reset R/W Description
No.
7:0
D
0x00 R Amount of data present in Tx FIFO
RFTXFTHRS (0x61D1) – Tx FIFO Threshold
Bit
Name Reset R/W Description
No.
7 – 0 R Reserved
6:0
D
000 R/W Threshold value for Tx FIFO
0000
RFTXFWR (0x61D2) – Tx FIFO Write Register
Bit
Name Reset R/W Description
No.
7:0
D
0x00 W Data written to this register is written to the Tx FIFO address at offset
RFTXFWP from the start of the Tx FIFO area (see Figure 25-1) is
returned. RFTXFWP (and RFTXFSWP if
RFFCFG.TXAUTODEALLOC = 1) is incremented by 1 modulo 0x80
unless the write fails.
350
CC2541 Proprietary Mode Radio SWRU191C– April 2009–Revised January 2012
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