152
* Note: ~XTS indicates that XTS has value zero
*/
BCSCTL1 |= XT2OFF | DIVA_2;
/*
* Basic Clock System Control 3
*
* XT2S_0 -- 0.4 - 1 MHz
* LFXT1S_2 -- If XTS = 0, XT1 = VLOCLK ; If XTS = 1, XT1 = 3 - 16-MHz crystal
or resonator
* XCAP_1 -- ~6 pF
*/
BCSCTL3 = XT2S_0 | LFXT1S_2 | XCAP_1;
/* USER CODE START (section: BCSplus_graceInit_epilogue) */
/* User code */
/* USER CODE END (section: BCSplus_graceInit_epilogue) */
}
void System_graceInit(void)
{
/* USER CODE START (section: System_graceInit_prologue) */
/* User initialization code */
/* USER CODE END (section: System_graceInit_prologue) */
/* Clear oscillator fault flag with software delay */
do
{
// Clear OSC fault flag
IFG1 &= ~OFIFG;
// 50us delay
__delay_cycles(50);
} while (IFG1 & OFIFG);
/*
* IFG1, Interrupt Flag Register 1
*
* ~ACCVIFG -- No interrupt pending
* ~NMIIFG -- No interrupt pending
* ~OFIFG -- No interrupt pending
* WDTIFG -- Interrupt pending
*
* Note: ~<BIT> indicates that <BIT> has value zero
*/
IFG1 &= ~(WDTIFG);
/*
* IE1, Interrupt Enable Register 1
*
* ~ACCVIE -- Interrupt not enabled
* ~NMIIE -- Interrupt not enabled
* ~OFIE -- Interrupt not enabled
* WDTIE -- Interrupt enabled
*
* Note: ~<BIT> indicates that <BIT> has value zero
*/
IE1 |= WDTIE;
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