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TMS570LS0714
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SPNS226E –JUNE 2013–REVISED NOVEMBER 2016
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System Information and Electrical SpecificationsCopyright © 2013–2016, Texas Instruments Incorporated
Table 6-32. Reset/Abort/Error Sources (continued)
ERROR SOURCE CPUMODE ERROR RESPONSE
ESM HOOKUP
GROUP.CHANNE
L
(2) Oscillator fail/PLL slip can be configured in the system register (SYS.PLLCTL1) to generate a reset.
N2HET1
Memory parity error User/Privilege ESM 1.7
N2HET2
Memory parity error User/Privilege ESM 1.34
MIBSPI
MibSPI1 memory parity error User/Privilege ESM 1.17
MibSPI3 memory parity error User/Privilege ESM 1.18
MibSPI5 memory parity error User/Privilege ESM 1.24
MIBADC
MibADC1 memory parity error User/Privilege ESM 1.19
MibADC2 memory parity error User/Privilege ESM 1.1
DCAN
DCAN1 memory parity error User/Privilege ESM 1.21
DCAN2 memory parity error User/Privilege ESM 1.23
DCAN3 memory parity error User/Privilege ESM 1.22
PLL
PLL slip error User/Privilege ESM 1.10
CLOCK MONITOR
Clock monitor interrupt User/Privilege ESM 1.11
DCC
DCC1 error User/Privilege ESM 1.30
DCC2 error User/Privilege ESM 1.62
CCM-R4
Self-test failure User/Privilege ESM 1.31
Compare failure User/Privilege ESM => NMI = > nERROR 2.2
VIM
Memory parity error User/Privilege ESM 1.15
VOLTAGE MONITOR
VMON out of voltage range N/A Reset N/A
CPU SELF-TEST (LBIST)
Cortex-R4F CPU self-test (LBIST) error User/Privilege ESM 1.27
PIN MULTIPLEXING CONTROL
Mux configuration error User/Privilege ESM 1.37
POWER DOMAIN CONTROL
PSCON compare error User/Privilege ESM 1.38
PSCON self-test error User/Privilege ESM 1.39
eFuse CONTROLLER
eFuse Controller Autoload error User/Privilege ESM => nERROR 3.1
eFuse Controller - Any bit set in the error status register User/Privilege ESM 1.40
eFuse Controller self-test error User/Privilege ESM 1.41
WINDOWED WATCHDOG
WWD Nonmaskable Interrupt exception N/A ESM => NMI => nERROR 2.24
ERRORS REFLECTED IN THE SYSESR REGISTER
Power-Up Reset N/A Reset N/A
Oscillator fail / PLL slip
(2)
N/A Reset N/A