Xilinx 7 Series User Manual

7 Series FPGAs GTP Transceivers User Guide www.xilinx.com 221
UG482 (v1.9) December 19, 2016
Pin Description and Design Guidelines
Zynq®-7000 AP SoC connected GTP Quads are described in Table 5-3.
Figure 5-3 shows the orientation in the device package pin field of the GTP Quads and power supply
groups. The grouping for the GTP Quads depends on the device package. The FGG484, FBG484,
CPG236, CLG485, CSG325, and SBG485 packages have a single common power plane for each of
the MGT supplies. The FGG676 and FBG676 packages have two power planes for each of the MGT
supplies. The FFG1156 package also has two power planes for each of the MGT supplies.
XC7A200T-FFG1156 G10 G10 G11 G11
Notes:
1. Single: GTP Quad is powered by a single set of power planes (MGTAVCC, MGTAVTT).
2. G10: GTP Quad is powered by the G10 set of package power planes. (MGTAVCC_G10, MGTAVTT_G10).
3. G11: GTP Quad is powered by the G11 set of package power planes. (MGTAVCC_G11, MGTA References to
the XC part numbers also apply to the XA and XQ part numbers where available. VTT_G11).
4. References to the XC part numbers also apply to the XA and XQ part numbers where available.
Table 5-3: Zynq-7000 Devices, Packages, GTP Transceivers, and Power Planes
Zynq-7000 AP SoC GTP Transceivers
MGT112
XC7Z012S-CLG485 Single
XC7Z015-CLG485 Single
Table 5-2: Artix-7 Devices, Packages, GTP Transceivers, and Power Planes
Artix-7 FPGA GTP Transceivers
MGT113 MGT213 MGT116 MGT216
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Xilinx 7 Series Specifications

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Brand	Xilinx
Model	7 Series
Category	Computer Hardware
Language	English