Altera DE1-SoC - Page 26

DE1-SoC User Manual
25
www.terasic.com
March 14, 2014
Figure 3-16 Connections between the LEDs and the Cyclone V SoC FPGA
Table 3-6 Pin Assignment of Slide Switches
Signal Name
FPGA Pin No.
Description
I/O Standard
SW[0]
PIN_AB12
Slide Switch[0]
3.3V
SW[1]
PIN_AC12
Slide Switch[1]
3.3V
SW[2]
PIN_AF9
Slide Switch[2]
3.3V
SW[3]
PIN_AF10
Slide Switch[3]
3.3V
SW[4]
PIN_AD11
Slide Switch[4]
3.3V
SW[5]
PIN_AD12
Slide Switch[5]
3.3V
SW[6]
PIN_AE11
Slide Switch[6]
3.3V
SW[7]
PIN_AC9
Slide Switch[7]
3.3V
SW[8]
PIN_AD10
Slide Switch[8]
3.3V
SW[9]
PIN_AE12
Slide Switch[9]
3.3V
Table 3-7 Pin Assignment of Push-buttons
Signal Name
FPGA Pin No.
Description
I/O Standard
KEY[0]
PIN_AA14
Push-button[0]
3.3V
KEY[1]
PIN_AA15
Push-button[1]
3.3V
KEY[2]
PIN_W15
Push-button[2]
3.3V
KEY[3]
PIN_Y16
Push-button[3]
3.3V
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